With advancement and popularization of information communication technology, demands for random numbers having high-quality randomness have increased. This is because an information security level depends on difficulty in predicting a random number. Further, in the field of scientific and engineering calculations, random numbers having high-quality randomness are required for more accurate calculations. For the aforementioned reasons, there is a growing demand for a random number generator for generating random numbers having high-quality randomness at high speed.
Among electronic circuits that generate random numbers, there is a random number generator configured by a digital circuit with an oscillator. This type of random number generator generates random numbers from an oscillation signal being affected by an ambient thermal noise. One type of the random generating circuit, which is configured by combining a digital circuit and an oscillator, includes a latch circuit and a circuit having a ring oscillator and an additional circuit serving as a thermal noise source.
An example of such random generating circuit is disclosed in JP-A-2001-166920. The random number generator disclosed in the publication is configured to add a thermal noise to an oscillation signal of the ring oscillator, to thereby add a fluctuation to the oscillation frequency of the ring oscillator. Thus, a phase of the oscillation at latch timing of the latch circuit is changed to generate a random number.
However, the circuit configured by combining a digital circuit with an oscillator as described in the publication needs consideration of two factors for oscillation frequency, i.e., easiness of latching at the oscillation frequency of the oscillator and easiness of changing the phase of an oscillation.
More particularly, in order to latch a numerical value input to a flip-flop, the numerical value should be determined before a setup time of a clock of the flip-flop and be held until a hold time lapses. Accordingly, an output signal that is output from the ring oscillator, which is utilized for a data input and a clock input in the flip-flop, needs to have a low frequency that is sufficient enough to assure the setup time and the hold time. However, a change in the phase of the output signal of the ring oscillator due to the noise is more easily caused when the output signal has a higher frequency.
As described above, the oscillation frequency of the oscillator is preferable to have a lower frequency in consideration of the easiness of the latch by the flip-flop whereas the oscillation frequency is preferable to have a higher frequency in consideration of the easiness of the change of the phase due to the noise. The oscillator is required to be designed while balancing the antinomic requirements described above.